1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a field effect transistor having the LDD structure.
2. Description of the Prior Art
In the recent MOS transistors the lightly doped drain structure (referred to as the LDD structure hereinafter) is being adopted in order to enhance the resistance to the hot carriers by reducing the intensity of the electric field in the vicinity of the drain.
Referring to FIG. 3, a method for manufacturing a CMOS transistor having MOS transistors of the conventional LDD structure.
Following the formation of a P well 202 and an N well 203 in an N-type silicon substrate 201, an oxide film 204 for device isolation with large thickness is formed on the surface of the silicon substrate 201 by a selective oxidation, and a gate insulating film 205 consisting of a silicon dioxide film by, for example, thermal oxidation is formed on the surface of the P well 202 and the N well 203. A first gate electrode 206a and a second gate electrode 206b are formed on the P well 202 and the N well 203, respectively, using, for example, an N.sup.+ -type polycrystalline silicon film. A photoresist film 221a having an opening that includes at least the gate insulating film 205 is formed on the surface of the P well 202, and an N.sup.- -type diffused layer 207 is formed by ion implantation which uses the photoresist film 221a, the gate electrode 206a, and the device isolating oxide film 204 as the mask [FIG. 3(a)].
After removing the photoresist film 221a, a photoresist film 221b having an opening at least in the gate insulating film 205 on the surface of the N well 203 is formed, and a P.sup.- -type diffused layer 211 is formed by ion implantation using the photoresist film 221b, the gate electrode 206b, and the device isolating oxide film 204 as the mask FIG. 3(b) .
After removing the photoresist film 221b, a vapor phase deposited silicon dioxide film 208 with thickness of 200 to 300 nm or so is deposited all over the surface [FIG. 3(c)].
Silicon dioxide films 209a and 209b for spacer are formed on the side walls of the gate electrodes 206a and 206b by applying reactive ion etching to the vapor phase deposited silicon dioxide film 208. The thickness of the silicon dioxide films 209a and 209b for spacer are equal [FIG. 3(d)]. It is to be noted in this specification that a side wall silicon dioxide film formed on the side faces of the gate electrode of the MOS transistor is called a silicon dioxide film for spacer.
A photoresist film 222a having an opening including at least the gate insulating film 205 on the surface of the P well 202 is formed, and an N.sup.+ -type diffused layer 210 by ion implantation using the photoresist film 222a, the gate electrode 206a, and the silicon dioxide film 209a for spacer as the mask FIG. 3(e) .
After removing the photoresist film 222a, a photoresist film 222b having an opening including at least the gate insulating film 205 on the surface of the N well 203 is formed, and a P.sup.+ -type diffused layer 212 is formed by ion implantation using the photoresist film 222b, the gate electrode 206b, the silicon dioxide film for spacer 209b, and the element isolating oxide film 204 as the mask [FIG. 3(f)].
By the above procedure, a CMOS transistor including MOS transistors with the LDD structure having a low concentration impurity diffused layer for reducing the electric field intensity in the vicinity of the drain is formed.
However, the method for manufacturing a CMOS transistor having MOS transistors of the conventional LDD structure requires four photolithography processes for the formation of the LDD type diffused layer. This means that two additional photolithography processes are needed compared with the case of forming a CMOS transistor having MOS transistors of non-LDD structure, leading to prolongation of the manufacturing process and generating problems of low yield and high cost of the product.
Furthermore, in the method for manufacturing a CMOS transistor having MOS transistors of the conventional LDD structure the insulating films for spacer formed on the side walls of the gate electrodes of the P-channel and the N-channel MOS transistors are formed in the same process. Therefore, the thicknesses of the insulating films for spacer formed on the side walls of the gate electrodes of both channels are equal, and there is a problem that it is not possible to form insulating films for spacer that have thicknesses optimum to the respective channels.